One Chip DVCAM? at DVinfo.net

Edwin Hernandez · May 19th, 2005, 09:17 PM

We have all seen 1 CCD mini DV cameras, we have seen 1 CCD HDV cameras, but I think this is the first time a DVCAM camera has one chip (although it's a CMOS). But I think that the chip must be a very good one to wear the "DVCAM" logo, which has a better reputation in the SD world than HDV in the HD world.

Any thoughts?
-EDWIN

Boyd Ostroff · May 19th, 2005, 10:04 PM

I think you may be right about being the first one chip DVCAM. But DVCAM is just a recording format for the tape. There is no difference between the actual data written to tape between regular DV and DVCAM. So I wouldn't draw any conclusion about the image quality because of the DVCAM logo.

It will be interesting to see how these cameras perform. If you want to shoot SD and record DVCAM it's probably not such a great deal. The manual controls look limited, tape loads from the bottom and it costs over $3,000.

Barry Green · May 20th, 2005, 09:35 AM

No, the original DSR-PD1 was a one-CCD model. It was a tiny shirt-pocket camera.

Boyd Ostroff · May 20th, 2005, 09:43 AM

Ha, you're right, my mistake! I forgot that I had seen one of these long ago:

http://www.video.com.mx/articulos/Vi...italDCRPD1.htm

Andre De Clercq · June 6th, 2005, 01:10 PM

There is nothing wrong with a single chip concept as such. A bit depending on the CMOS process yield and DSP speed evolution, we will soon all end up with a 2/3" (or bigger) single chip camera.

Radek Svoboda · June 6th, 2005, 02:05 PM

The chip pixels so dense it does not make difference if it is 1 or 3 chip, not in DV or DVCAM format, except for lower low light capability with onechipper.

Radek

Wayne Morellini · June 9th, 2005, 08:01 AM

Radek's right. Though there are advantages to 3 chip, and some problems, at these resolutions with bayer filter and de-bayered 4:2:0 output, the differences should be less obvious. Though, expect to be able to do less with this in post resolution upscaling etc.

I'm curious if the sensor itself is interlace or not. Bayer should not work to well through interlace, as it would cut the Bayer pattern in half and lead to misalignment of the colour data from field to field. Is this a pure RGB pattern running horizontally instead?

Wayne.

Andre De Clercq · June 9th, 2005, 02:18 PM

For HDV (1080i applied in HC1) the sensor needs interlaced readout. So I think it needs a vertical stripe RGB filter structure or a 4 color filter (CRBY) filter if it is interlace only. CMOS however allows more flexibility in readout and on chip processing schemes, and the "two lines at the time" readout needed for avoiding interline flicker could also be perfomed as separate line readouts with demosaicing in on chip instead of first summing up the two lines. In the latter case also a Bayer filter variant could be used for interlaced readouts

May 19th, 2005, 09:17 PM	#1
Edwin Hernandez Regular Crew Join Date: Sep 2004 Location: Panama City, Panama Posts: 162	One Chip DVCAM? We have all seen 1 CCD mini DV cameras, we have seen 1 CCD HDV cameras, but I think this is the first time a DVCAM camera has one chip (although it's a CMOS). But I think that the chip must be a very good one to wear the "DVCAM" logo, which has a better reputation in the SD world than HDV in the HD world. Any thoughts? -EDWIN

May 19th, 2005, 10:04 PM	#2
Boyd Ostroff Wrangler Join Date: Dec 2002 Location: Mays Landing, NJ Posts: 11,802	I think you may be right about being the first one chip DVCAM. But DVCAM is just a recording format for the tape. There is no difference between the actual data written to tape between regular DV and DVCAM. So I wouldn't draw any conclusion about the image quality because of the DVCAM logo. It will be interesting to see how these cameras perform. If you want to shoot SD and record DVCAM it's probably not such a great deal. The manual controls look limited, tape loads from the bottom and it costs over $3,000.

May 20th, 2005, 09:35 AM	#3
Barry Green Barry Wan Kenobi Join Date: Jul 2003 Location: North Carolina Posts: 3,863	No, the original DSR-PD1 was a one-CCD model. It was a tiny shirt-pocket camera.

May 20th, 2005, 09:43 AM	#4
Boyd Ostroff Wrangler Join Date: Dec 2002 Location: Mays Landing, NJ Posts: 11,802	Ha, you're right, my mistake! I forgot that I had seen one of these long ago: http://www.video.com.mx/articulos/Vi...italDCRPD1.htm

June 6th, 2005, 01:10 PM	#5
Andre De Clercq Major Player Join Date: Sep 2002 Location: Belgium Posts: 804	There is nothing wrong with a single chip concept as such. A bit depending on the CMOS process yield and DSP speed evolution, we will soon all end up with a 2/3" (or bigger) single chip camera.

June 6th, 2005, 02:05 PM	#6
Radek Svoboda Major Player Join Date: Mar 2005 Location: Prague, Czech Republic Posts: 500	The chip pixels so dense it does not make difference if it is 1 or 3 chip, not in DV or DVCAM format, except for lower low light capability with onechipper. Radek

June 9th, 2005, 08:01 AM	#7
Wayne Morellini Inner Circle Join Date: May 2003 Location: Australia Posts: 2,762	Radek's right. Though there are advantages to 3 chip, and some problems, at these resolutions with bayer filter and de-bayered 4:2:0 output, the differences should be less obvious. Though, expect to be able to do less with this in post resolution upscaling etc. I'm curious if the sensor itself is interlace or not. Bayer should not work to well through interlace, as it would cut the Bayer pattern in half and lead to misalignment of the colour data from field to field. Is this a pure RGB pattern running horizontally instead? Wayne.

June 9th, 2005, 02:18 PM	#8
Andre De Clercq Major Player Join Date: Sep 2002 Location: Belgium Posts: 804	For HDV (1080i applied in HC1) the sensor needs interlaced readout. So I think it needs a vertical stripe RGB filter structure or a 4 color filter (CRBY) filter if it is interlace only. CMOS however allows more flexibility in readout and on chip processing schemes, and the "two lines at the time" readout needed for avoiding interline flicker could also be perfomed as separate line readouts with demosaicing in on chip instead of first summing up the two lines. In the latter case also a Bayer filter variant could be used for interlaced readouts