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May 24th, 2005, 04:31 PM | #31 |
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There was a thread in FX1 forum of Italian guy who takes camera apart and replaces lens with manual one. He posted complete pictures of disassembling and assembling camera. You can see CCD chips and everything.
Also please check this camera. If you make recorder for this camera, you'll compete against 100,000 USD cameras. Camera has HDSDI and other outputs: http://www.ggvideo.com/sny_hdcx300k.htm Radek |
May 24th, 2005, 04:36 PM | #32 |
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May 24th, 2005, 10:45 PM | #33 |
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I actually saw that, he had that site up the first couple of weeks the fx1 was out and I was so impressed. The aftermarket lenses almost completely eliminated colour fringing that was visible with the zeiss.
I had read a bunch of places that the output from the current sony hdv cameras are after compression but when you guys said it was pre compression I went digging again. It wasn't as pronounced as the articles about it possibly being after compression so I say, I was wrong, and apoligize for my above comment that I was almost sure. Now, their is one thing I am sure about in life, and that is - The shower curtain goes on the inside of the bath tub. Thats all the wisdom I have. ;) |
May 25th, 2005, 01:30 AM | #34 | |
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Quote:
Did you look on http://www.archive.org ? there is a "time portal" for the web :) If it was a uni website, there is a high probability that it was archived there. |
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May 25th, 2005, 03:30 AM | #35 | |
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Still, if anybody is interested, maybe thee is a micro-controller board with GIGE/SATA out thee already that a component ADC could be interfaced to (actually the most recent VIA ITX chipset might have SATA and a component in, but let's not go there). |
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May 25th, 2005, 09:59 AM | #36 |
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I've spent weeks with my froot loops decoder ring (I'm just joking about the ring) and the ata specs and I think I have a good working understanding of the theory of how it should work. And it isn't that bad once you slim down what you want the thing to do. Their are a handful of projects that interfaced ata hard drives to pic microcontrollers and the like.
Sata - That is another ball game altogether. The spec sheet is 200 pages lighter than ata 6 but I think in order to understand it you need to send away for special decoder ring set and a pair of retro blue/red stereoscopic movie glasses. So, what i'm trying to say is I blatantly don't understand sata so that is why I avoid it. The only way it seems anyone will interface with sata with embedded is with a sapis compliant chip - so not only do you have to decode sata 1.0a spec, you need to decode the sapis spec (I think this is why the stereoscopic glasses are needed - You put the sheets side by side and then you see the answer). And even if you solve that then getting a sapis chip is going to be a little difficult unless you want to solder onto the pins of a pci sata card and hope the chip on it is sapis compliant. I hope the joking around didn't offend anyone - I though I understood the ata spec in depth but clearly its kicking my butt in some things so it's just got me a little dis-heartened so I'm trying to lighten my mood about it. |
May 26th, 2005, 12:31 AM | #37 |
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;)
....... |
May 26th, 2005, 03:29 AM | #38 |
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found that while lurking around : http://www.toshiba.com/taec/componen...SerialSATA.pdf
Is it hard to use an ASIC like that in a design ? i'm a software guy, i don't have any clues about electronic design. Btw, a cmos sensor output is parallel, right ? wouldn't it make more sens to use PATA then, instead of serializing it for SATA ? |
May 26th, 2005, 07:02 AM | #39 |
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Its more that the command sturture of sata is so strange. It doesn't use registers like pata, it sends data in a more packet like form called "frames" and these have a different structure and command set then any of the ata 1-7 command sturcture.
I don't pretend to know how sata works so i can't make any real good judgements. All I know is that right now given a chip like that I still need to know how to frame the data. All that does is convert it to a serial stream really so without understanding the sata spec its useless. Now if you understand the sata spec then that might actually be a good device to start with. As for the pata vs sata question. Since its parallel coming off the chip you would expect it to be easier. Actually its a might bit harder. When data is being transfered pata will always use a 16bit wide bus. If you got 10 bit and you don't want to waste space you have to pack the data. So every 5 words sent you save 8 pixels, but that means a lot of data suffling. You have to have buffers and stuff to handle the data and take it from 10 bit to 16bit. On the first data transfer you have 1 pixel plus 6 bits of the next, and on the next you have 4 bits of the last, 10 of the next, and 2 of the next. Its not nice to handle data that way. With sata it being an 8 or 10 bit protocol it could be perfect to handle 10 bit hd, but I don't have a clue how. Oh well |
May 26th, 2005, 07:32 PM | #40 |
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Yes, Pity, I only suggested it, because SATA cables are smaller and are easy enough to eliminate a caddy. Still if you can find yourself a experienced Open-source programmer, you can solve most of these.
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May 26th, 2005, 08:59 PM | #41 |
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Who knows, the answer to sata just may come to me in a dream - or I'll spend some weeks trying to figure it out next semester.
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June 6th, 2005, 06:27 AM | #42 |
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These people are claiming the PRO HVR-A1 version of that cheap Sony HDV camera mentioned, is three chip, that would make the price make more sense.
http://www.globalmediapro.com/video/...der--1322.html |
June 6th, 2005, 11:04 AM | #43 |
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I posted very recently Sony Japan info in camera HDV thread. I's one chipper with 1920x1080 square pixels, with Bayer filter effective resolution becomes 1440x1080. With digital stabilization it appears camera is using 1440x810 pixels, 25% drop in resolution vertically and horizontally, but maybe I'm wrong. The English translation is bad.
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June 6th, 2005, 05:40 PM | #44 |
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Yes, I've seen the brochures last night (lets hope that the pictures were from the standard cam) and some pictures from the HC1 (I think). Notice on the power lines in those pictures no bayer problems, but that might be from the 4:2:0 as well. Looking good. The HC1 appears to not quiet achieve the neutral saturation I like, but no idea if it achieves the colour depth I'm looking for, along with 10+bits analogue out. But I don't have pictures for the A1, from the brochure it has a nicer level of saturation, but that could be enhanced for print.
So your certain the A1 is 1 chip, I could not find effective reference to number of chips in brochure? Just a word of advice Radek, you'll find a number of people in this section of the forum will snob off the idea of this camera based on chip size "alone". Mid sized chips don't worry me too much, as I have effective means to deal with all their shortfalls except S/N. I've notice that there is a VIA chipset that has video input ports, I don't know any details, they could be component, but it would be interesting to try recording with something like this, and even Cineralla (Linux Pro capture/Edit). Which, apparently, does pure three chip 4:4:4 recording no problems (though I don't know if it has component support and I imagine not for the VIA MB as standard. So it might still be possible to bypass the HDSDI step. Ohh, yes, Keith, they have just announced the new version of SATA, more things to wrap around our heads. Pity they don't just replace all these interfaces with one interface, could make life a lot easier. Anyway, lets wait and see. |
June 6th, 2005, 05:57 PM | #45 |
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Wayne,
DVCPRO HD P2 Panasonic uncompressed analog output is either 1080i or 720p, no 1080p. Interesting, isn't it, after all 1080p claims. So 1080p is likely to be interpolated from one of the modes, similarly as CF25 on Sony HDV. Quite shocker. Maybe Canon will be first one to deliver true 1080p under 10,000 USD. Small HDV Sonys are one chippers. It was announced on beginiing. Camcorderinfo may have some details. I don't see reason for small Sonys top have inferior picture to FX/Z1, except in low light. Radek |
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